1. Field of the Invention
The present invention relates to a vibration wave motor, and more particularly to a drive circuit for a vibration wave motor which controls a drive frequency of a motor by a phase locked loop.
2. Related Background Art
A drive circuit for a vibration wave motor which always drives the motor at a resonant frequecy by using a phase locked loop has been proposed by the present applicant in Japanese patent application No. 226566/1985 (U.S. Ser. No. 915,429).
FIG. 1 shows the drive circuit of the above patent application.
Numeral 1 denotes a stator as a vibration member on which electrostrictive elements are arranged, and numerals 1-1, 1-2 and 1-3 denote electrodes. The electrodes on the stator are arranged as shown in FIG. 2. The electrodes 1-1 and 1-2 are arranged on two groups of electrostrictive elements polarized on the surface of the stator and serve as drive electrode which apply periodic voltages having a phase difference of 90.degree. therebetween to the respective groups of electrostrictive elements. The electrode 1-3 is arranged on a electrostrictive element electrically insulated from the drive electrodes 1-1 and 1-2 and serves as a monitor electrode for detecting a vibration status of the stator by the output of the electrostrictive element. Numeral 1-4 denotes a common electrode to the electrodes 1-1, 1-2 and 1-3. The directions of polarization and arrangement of the electrostrictive elements are known and hence explanation thereof is omitted. Numerals 7 and 8 denote amplifiers and numerals 10 and 11 denote coils which are connected to the drive electrodes 1-1 and 1-2.
Numeral 17 denotes a comparator which is connected to the electrode 1-1 and shapes a sine wave of the electrode to produce a logic level pulse. Numeral 2 denotes a comparator which converts an output waveform (sine wave) of the monitor electrode to a logic level pulse. Numeral 12 denotes a phase comparator having one input terminal thereof connected to an output of the comparator 2 and the other input terminal connected to an inverter 18. It is known by U.S. Pat. No. 4,291,274 and hence detail thereof is not explained. It produces an output only when a phase difference between the inputs is detected.
Block diagram and input/output characteristic are shown in FIGS. 3 and 4. When an input pulse (rising signal) to an input terminal R is applied earlier than a rising signal to an input terminal S, the output is Vcc (high level signal H) only during a period between the rising signals, and the output is open (high impedance state) by the input of the rising signal to the input terminal S.
When the input pulse (rising signal) to the input terminal S is applied earlier than the rising signal to the input terminal R, the output is ground level (low level L) during the period between the rising signals.
The output is open other than when it is H or L. Accordingly, when the phase difference is zero, the output is kept open.
Numeral 4 denotes a low-pass filter which filters the output of the comparator 12. Numeral 5 denotes a voltage controlled oscillator (VCO) which produces a signal of a duty factor of 50% at a frequency determined by the input voltage. An input thereof is connected to the output of the low-pass filter 4. The input voltage and the output frequency of the VCO 5 is of linear function so that as the voltage goes higher, the output frequency goes higher.
In order to prevent the vibration wave motor from being locked at a resonance frequency other than a true resonance frequency, the oscillation frequency of the VCO S is restricted. For example, assuming that the true resonance frequency of the vibration wave motor is 40 KHz and adjacent resonance frequencies are 38 KHz and 42 KHz, the VCO 5 is restricted to oscillate within a range of 38 KHz to 42 KHz excluding 38 KHz and 42 KHz.
Numeral 19 denotes a frequency divider which frequency-divides the output of the VCO 5 by a factor of 32. An output of the frequency divider is applied to the electrode 1-1 through the amplifier 7 and the coil 10. The output of the frequency divider 19 is connected to a D input terminal of an eight-stage shift register 20. The output of the VCO 5 is supplied to a clock terminal of the register 20 as a clock pulse. Since the frequency of the VCO 5 is 32 times as high as that of the output pulse of the frequency divider 19, the frequency of the D input of the register 20 is also 32 times as high as that of the clock pulse, and the output pulse Q8 of the shift register 20 is 90.degree. retarded with respect to the D input signal. The oscillation frequency of the VCO 5 is selected to 32 times of the resonance frequency of the vibration wave motor.
Numeral 25 denotes an eight-stage shift register. The output of the comparator 17 is supplied to the D input terminal of the register and the output of the VCO 5 is applied to the clock input terminal. Accordingly, a pulse retarded by 90.degree. with respect to the input signal to the D input terminal is produced at the output terminal Q8. Since the output pulse of the frequency divider 19 and the output pulse of the comparator 17 are of the same phase, the output pulse Q8 of the eighth stage of the shift register 25 which receives the output pulse of the frequency divider 19 as the D input and the output of the VCO 5 as the clock is retarded by 90.degree. with respect to the D input signal or the signal of the electrode 1-1.
The output Q8 of the shift register 25 is applied to an S input of the phase comparator 12 through an inverter 18. The electrodes 1-1 and 1-3 are arranged in 90.degree. shift relationship, and the output frequency of the VCO 5 is restricted such that it is within adjacent resonance frequencies to the true resonance frequency of the vibration wave motor.
The operation of the vibration wave motor thus constructed is now explained.
In the vibration wave motor, when it is in a resonance state, a phase of the drive signal of the electrode 1-1 or 1-2 and a phase of the signal of the monitor electrode 1-3 are in a predetermined relationship depending on a positional relationship of the drive electrode 1-1 or 1-2 and the monitor electrode 1-3, that is, the positional phase relationship of the electrodes and the phase relationship of the signals of the electrodes are identical. If the above phase relationship is maintained, the vibration wave motor can always be resonance-driven. In the vibration wave motor shown in FIG. 1, the electrodes 1-1 and 1-3 are arranged with 90.degree. phase shift. Thus, if the waveforms of the electrodes 1-1 and 1-3 are shifted by 90.degree. from each other, the vibration wave motor can be resonance-driven. In the vibration wave motor of FIG. 1, the phases of the waveforms at the electrodes 1-3 and 1-1 are detected by the comparator 12 and controlled to keep the 90.degree. phase difference therebetween.
The operation is now explained. The VCO 5 generates a pulse of 50% duty factor at a predetermined frequency. The pulse is frequency-divided by a factor of 32 by the frequency divider 19 and they are supplied to the first group of electrostrictive elements on the stator 1 through the amplifier 7, coil 10 and electrode 1-1. A signal produced at the electrode 1-1 by the action of a resonance circuit comprising the coil 10, electrode 1-1 and stator 1 is a sine wave, which is applied to the electrostrictive elements.
On the other hand, the output of the frequency divider 19 is applied to the D input of the shift register 20 and the output pulse of the VCO 5 is applied to the register 20 as the clock pulse. Accordingly, the Q8 output pulse of the register 20 is 90.degree. shifted with respect to the output pulse of the frequency divider 19 and it is converted to a sine wave by the amplifier 8, coil 11 and electrode 1-2 and the sine wave is applied to the record group of electrostrictive elements. If the sine waves applied to the electrodes 1-1 and 1-2 are at the resonance frequency of the vibration wave motor, the periodic voltages having the 90.degree. phase difference are applied to the respective groups of electrostrictive elements having the phase difference therebetween and a travelling vibration wave is generated on the surface of the stator 1 and the movable member which frictionally contacts to the stator is driven by the travelling vibration wave so that it rotates.
The vibration of the stator is converted to a periodic voltage representing the vibration by the electrostrictive elements connected to the electrode 1-3 and it is detected by the monitor electrode and converted to a pulse by the comparator 2, and the pulse is supplied to the R input of the comparator 12. On the other hand, the waveform of the electrode 1-1 is converted to a pulse by the comparator 17 and the pulse is supplied to the D input of the register 25. Since the shift clock pulse of the register 25 is the pulse from the VCO 5, the output pulse Q8 of the shift register 25 is retarded by 90.degree. with respect to the waveform of the electrode 1-1. It is inverted by the pulse inverter 18, the output of which is supplied to the S input of the phase comparator 12.
As described above, the output pulse Q8 of the register 25 is retarded by 90.degree. as shown in FIG. 5(b) with respect to the pulse applied to the amplifier 7 as shown in FIG. 5(a). This pulse is inverted by the inverter 18 and the inverted pulse is applied to the S input of the comparator 12. Accordingly, the pulse to the S input of the comparator 12 is advanced by 90.degree. as shown in FIG. 5(c) with respect to the pulse of FIG. 5(a).
Thus, if the phase of the pulse at the S input of the comparator 12 is in phase with the phase of the pulse at the R input of the comparator 12, there is a 90.degree. phase difference between the electrodes 1-3 and 1-1 and the resonance state is detected. If the input signals to the R input and S input of the comparator 12 are in phase, the comparator 12 keeps its output open and the VCO 5 continues the oscillation. Accordingly, the resonance drive is kept.
When the vibration wave motor is not in the resonance state, the signal of the electrode 1-3 is shifted forward or backward from the 90.degree. phase shift with respect to the signal of the electrode 1-1. Accordingly, the phases of the pulses to the R input and S input of the comparator 12 are not in phase. For example, if the rise signal of the pulse to the R input of the comparator 12 occurs earlier than the rise signal of the pulse to the S input as shown in FIG. 4, the output of the comparator 12 is H for a period corresponding to a time difference between the rise times. If the rise signal to the S input occurs earlier than the rise signal to the R input, the output of the comparator 12 is L for the period corresponding to the rise time difference. Accordingly, if the pulse of the comparator 2, that is, the waveform of the electrode 1-3 is advanced with respect to the pulse of the inverter 18, namely, if the phase difference between the waveforms of the electrodes 1-1 and 1-3 is larger than 90.degree., the output of the comparator 12 is H for a period corresponding to the phase difference and the H output is supplied to the VCO 5 through the low-pass filter 4. As a result, the input voltage to the VCO 5 increases and the oscillation frequency rises accordingly. As the oscillation frequency of the VCO 5 goes higher, the signal applied to the electrode 1-1 is more advanced with respect to the signal generated at the electrode 1-3. Accordingly, the phase difference between the electrodes 1-1 and 1-3 is controlled toward 90.degree..
If the phase difference between the electrodes 1-1 and 1-3 is smaller than 90.degree., the rise signal to the S input of the comparator 12 occurs earlier than the rise signal to the R input and the output of the comparator 12 is L for a period corresponding to the phase difference and the oscillation frequency of the VCO 5 falls. As a result, the drive frequency to the electrodes 1-1 and 1-2 falls and the phases of the waveforms of the electrodes 1-1 and 1-3 increase and the phase difference between the electrodes 1-1 and 1-3 shifts toward 90.degree..
In this manner, the phase difference between the waveforms of the electrodes 1-1 and 1-3 is detected and the drive frequency of the vibration wave motor is limited such that the phase difference is always kept at 90.degree.. Thus, the vibration wave motor is always driven in the resonance state.
In the vibration wave motor of FIG. 1, the resonance frequency is controlled to the true resonance frequency of the vibration wave motor by the phase locked loop by the phase comparison of the signals, but the resonant frequency is subject to affect of an environment change such as temperature change and it may be locked to other resonance frequency than the true resonance frequency of the vibration wave motor. FIG. 6 shows a circuit diagram of the VCO 5. Numeral 5-1 denotes an operational amplifier, numerals 5-2, 5-6, 5-7, 5-8 and 5-9 denote NPN transistors, numerals 5-3, 5-4 and 5-5 denote PNP transistors, numerals 5-10 and 5-16 denote resistors, numeral 5-11 denotes a capacitor, numerals 5-14 and 5-15 denote NAND gates and numeral 5-17 denotes a constant current source. An input of the VCO 5 is a .sym. input of the operational amplifier 5-1, and a .crclbar. input of the amplifier 5-1 is connected to an emitter of the transistor 5-2 and one end of the resistor 5-10, the other end of which is connected to GND. The operational amplifier 5-1, transistor 5-2 and resistor 5-10 constitute a voltage-current converter which supplies a current representing a voltage applied to the amplifier 5-1 to a collector of the transistor 5-2.
The collector of the transistor 5-2 is connected to collector and base of the transistor 5-3, bases of the transistors 5-4 and 5-5 and the constant current source 5-17, and the transistors 5-3, 5-4 and 5-5 constitute a current mirror circuit.
A collector of the transistor 5-4 is connected to collectors of the transistors 5-6 and 5-7 and bases of the transistors 5-7, 5-8 and 5-9. A collector of the transistor 5-5 is connected to collectors of the transistors 5-8 and 5-9, .crclbar. input of the comparator 5-12, .sym. input of the comparator 5-13 and the capacitor 5-11. A reference voltage V.sub.1 is applied to the .sym. input of the comparator 5-12 and a reference voltage V.sub.2 (V.sub.1 &gt;V.sub.2) is applied to the .crclbar. input of the comparator 5-13. The output of the comparator 5-12 is applied to one input of the NAND gate 5-14, and the output of the NAND gate 5-15 is applied to the other input of the gate 5-14. The output of the comparator 5-13 is applied to one input of the NAND gate 5-15 and the ouput of the gate 5-14 is applied to the other input of the gate 5-15.
The gates 5-14 and 5-15 constitute a flip-flop, and an output of the gate 5-15 of the flip-flop is applied to a base of the transistor 5-6 through the resistor 5-16.
The operation of the VCO 5 thus constructed is now explained. Since the output of the filter 4 is applied to the amplifier 5-1 of the VCO, a current corresponding to the output voltage of the filter 4 flows through the resistor 5-10 so that a voltage is developed at the collector terminal of the transistor 5-2. The amplifier 5-1, resistor 5-10 and transistor 5-2 constitute a voltage-current converter which converts the filter output to a current. More specifically, assuming that the output of the filter 4 is V, the voltage V is applied to the resistor 5-10 and a current i.sub.1 =V/R (where R is a resistance of the resistor 5-10) flows through the resistor 5-10. Assuming that the constant current of the constant current source 5-17 is i.sub.2, a sum current I of the currents i.sub.1 and i.sub.2 is supplied from the transistor 5-3. The current of the transistors 5-4 and 5-5 which constitute the current mirror circuit is also equal to I.
Let us assume that the transistor 5-6 is off and the capacitor 5-11 has been charged. Under this condition, all portions of the current flowing through the transistor 5-4 flows into the transistor 5-7, and the same current as that which flows through the transistor 5-7 flows into the transistor 5-7 and the transistors 5-8 and 5-9 which constitute the current mirror circuit. As a result, the current flowing through the transistor 5-5 and the currents flowing through the transistors 5-8 and 5-9 are equal, and a current corresponding to the current which flows into the transistor 5-5 flows out of the capacitor 5-11 and the capacitor 5-11 is discharged by the current flowing through the transistor 5-5, that is, the current I.
As a result, the potential of the capacitor 5-11 drops. When it falls below the reference level V.sub.2, the output of the comparator 5-13 becomes L and the output of the NAND gate 5-15 of the flip-flop becomes H. As a result, the transistor 5-6 is turned on. Thus, the current flowing through the transistor 5-4 flows to ground and the transistors 5-7, 5-8 and 5-9 are turned off. Thus, the capacitor 5-11 is charged by the constant current flowing through the transistor 5-5, that is, the current I and the potential of the capacitor 5-11 rises and reaches the reference V.sub.1. As a result, the comparator 5-12 is flipped to change the output to L, which causes the output of the NAND gate 5-15 to be changed to L and the transistor 5-6 to be turned off again. Then, the discharge is again carried out and the charge and discharge are repeated.
As described above, the VCO 5 repeats the charge and discharge by the current I corresponding to the input voltage to the capacitor 5-11 and produces the output pulse of 50% duty factor at a frequency corresponding to the input voltage.
In the circuit of FIG. 1, the pulse of the VCO 5 shown in FIG. 6 is frequency-divided by a factor of 32 by the frequency divider 19 and the frequency-divided pulse is applied to the drive electrode 1-1 as the drive signal. For example, when the resonance frequency of the vibration wave motor is 40 KHz, the frequency of the VCO 5 is 40 KHz.times.32=1.28 MHz which is very high. Since the frequency of the output pulse of the VCO 5 is determined by one cycle of charge/discharge to the capacitor 5-11 of the VCO 5 as described above, one cycle of charge/discharge of the capacitor 5-11 required to establish the frequency of 1.28 MHz is equal to 1/1.28 MHz.times.1/2=390 nsec. Since the transistors 5-6 to 5-9, comparators 5-12 and 5-13 and NAND gates 5-14 and 5-15 are inverted to switch the charging and discharging of the VCO 5, a switching time, for example, 50 nsec. is required under a normal condition. Thus, the actual charge/discharge time of the capacitor is 390-50=340 nsec.
On the other hand, the inversion operations of the elements 5-6 to 5-9 and 5-12 to 5-15 when they are switched are affected by the change of environment or a supply voltage Vcc to the VCO 5, and the switching time may vary from the normal 50 nsec. depending on the change of environment.
Let us assume that the switching time has changed from 50 nsec. to 90 nsec. by the change of environment.
In such a case, one cycle of charge/discharge of the capacitor 5-11 including the switching time is 340+90=430 nsec. and the frequency of the VCO 5 is 1/430.times.2 nsec.=1.1627 MHz. The output frequency of the 1/32 frequency divider 19 is 37.2 KHz.
Thus, the drive frequency of the vibration wave motor which is normally 40 KHz may change to 37.2 KHz by the change of environment. Thus, in spite of limiting the frequency of the VCO 5 within the range of 38-42 KHz to prevent the resonance frequency from being shifted to other resonance frequecy than the true resonance frequency, the self-running frequency of the VCO 5 falls to 37.2 KHz which is below the above range, and the resonance frequency of the VCO 5 may be locked to other resonance frequency than the true resonance frequency.
The change of the self-running frequency of the VCO 5 occurs not only in the VCO shown in FIG. 6 but also in VCO's of other configurations, and the departure from the true resonance frequency of the vibration wave motor due to the change of frequency of the VCO 5 causes a trouble to the operation of the vibration wave motor.
When the vibration wave motor is driven by the phase locked loop control at a high efficiency, it can be driven at the true resonance frequency of the vibration wave motor, but if the vibration wave motor always is driven by the phase locked loop control, the vibration wave motor may be abruptly rotated at the start of rotation.